RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
Figure 6 A1SP Block Diagram
Cell Service
Decision
4
2
(CSD)
Transmit Frame
Transfer Controller
(TFTC)
3
Transmit Adaptation
Layer Processor
(TALP)
Input from LI
Block
TALP FIFO Block
Output to UI
Block
(TFIFO)
5
6
1
To External
Memory
Local Loopback
Block (LOC_LPBK)
7
Receive Frame
Transfer Controller
(RFTC)
Receive Adaptation
Layer Processor
(RALP)
Output to LI
Block
RALP FIFO Block
(RFIFO)
Input from UI
Block
Internal RAM
10
9
8
Microprocessor
Control Bus
1. TFTC stores line data into the memory 16 bits at a time.
2. When the TFTC finishes writing a complete frame into the memory, it notifies
the CSD of a frame completion by writing the line and frame number into a
FIFO. Idle channel detection is processed here if enabled.
3. The CSD checks a frame-based table for queues having sufficient data to
generate a cell. For each queue with enough data to generate a cell, the CSD
schedules the next cell generation occurrence in the table.
4. The CSD commands the TALP to generate a cell from the available data for
each of the ready queues identified in step 3.
5. The TALP generates the cell from the data and signaling buffers and writes
the cell into the TALP FIFO.
6. The TFIFO block buffers cells which will be transmitted out to the UTOPIA
Interface block.
7. If local loopback is enabled the cell is looped to RALP.
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