RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
Direct
H-MVIP
Pin
RL_SIG[2]
RL_SIG[1]
RL_SIG[0]
RL_CLK[7]
RL_CLK[6]
RL_CLK[5]
RL_CLK[4]
RL_CLK[3]
RL_CLK[2]
RL_CLK[1]
RL_CLK[0]
CRL_CLK
P22
T22
Y21
A21
E21
G22
J22
RL_SIG[1]
RL_SIG[0]
L22
P21
T21
AA22
D18
C4B
Clock Generation Control Interface(18)
Pin Name
Type
Pin No.
Function
CGC_DOUT[3]
CGC_DOUT[2]
CGC_DOUT[1]
CGC_DOUT[0]
Output AB16
AB14
External Clock Generation Control Data Out
Bits 3 to 0 form the SRTS correction code
when SRTS_STBH is asserted; otherwise
CGC_DOUT[3:0] bits form the channel
status and frame difference when
Y15
AA15
ADAP_STBH is asserted.
CGC_LINE[3]
CGC_LINE[2]
CGC_LINE[1]
CGC_LINE[0]
Output AB19
AA18
CGC Line Bits 3 to 0 form the line
CGC_DOUT corresponds to when
SRTS_STBH is asserted; otherwise
CGC_LINE[3:0] bits form the adaptive state
machine index when ADAP_STBH is
asserted.
W19
AB18
SRTS_STBH
Output AA20
SRTS Strobe indicates that an SRTS value is
present on CGC_DOUT[3:0].
CGC_LINE[4:0] indicates the line the SRTS
code controls.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
58
PMC [ PMC-SIERRA, INC ]
