RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
room for a cell and determines its address is on the bus, it will respond by driving
TPHY_CLAV high two cycles later. If CS_MODE_EN is set in the UI_SNK_CFG
register, then CSB should be driven low one cycle after the TPHY_ADDR. As a
result, the master will activate TPHY_ENB to initiate a transfer. When
TPHY_TSX is high the SNK_INTF will compare the prepended address with
value stored in UI_SNK_ADDR_CFG register and if they match it will accept the
data. TPHY_TSX should be driven high during the prepended byte address and
TPHY_SOC should be driven high during the first header byte of the ATM cell.
Only cell level handshaking and no data transfer pausing is supported in Any-
PHY mode, thus once transfer is initiated TPHY_ENB should remain asserted
until the last data is transferred. Note that TPHY_CLAV is masked after the poll
(when the address is applied) which is coincident with the assertion of TSX. Also
note that, in Any-PHY mode both TPHY_ENB and TPHY_SOP are optional and
both could be tied low indefinitely.
Figure 99 SNK_INTF Start-of-Transfer (Any-PHY PHY Mode)
TPHY_CLK(i)
TPHY_ADDR(i)
TPHY_ADDR3_TCSB(i)
TPHY_CLAV(o)
AAL1 Addr
TPHY_DATA (i) (16-bit)
TPHY_DATA(i) (8-bit)
TPHY_ADDR4_TSX(i)
TPHY_ENB(i) *
Addr
Addr
D1
D1
D2
D2
D3
D3
D4
D4
TPHY_SOC(i) *
* TPHY_ENB and TPHY_SOC could be tied low for Any-PHY mode
Figure 100 shows the end of transfer for Any-PHY mode.
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL
316
PMC [ PMC-SIERRA, INC ]
