RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
accept another complete cell. Note that one additional cycle is used to allow the
input TPA signal to be clocked into the master device, thus the PHY must assert
TPA low along with data byte D49 and no later if it cannot accept another cell.
Figure 86 SRC_INTF End-of-Transfer Timing (Utopia 1 ATM Mode)
TATM_CLK(i)
TATM_CLAV sampled here
TATM_CLAV(i)
TATM_ENB(o)
TATM_TSOC(o)
TATM_DATA(o)
TATM_PAR(o)
D48
D48
D49
D49
D50
D50
D51
D51
D52
D52
D53
D53
In PHY slave mode, the SRC_INTF block sources RPHY_DATA, RPHY_PAR,
RPHY_SOC, and RPHY_CLAV, while receiving RPHY_ENB. The
RPHY_ADDR(4:0) inputs are not used in Utopia 1 PHY slave mode but must be
set to be the same value as the UI_SRC_ADDR_CFG register value for proper
operation. The RPHY_SOC indication is generated coincident with the first word
(8-bit or 16-bit) of each cell that is transmitted on RPHY_DATA. In PHY mode,
RPHY_DATA, RPHY_SOC, and RPHY_PAR are driven only when valid data is
being sent; otherwise they are tristated.
Figure 87 UI_SRC_INTF Start-of-Transfer Timing (Utopia 1 PHY Mode)
RPHY_CLK(i)
RPHY_ADDR(i)
RPHY_CLAV(o)
RPHY_ENB(i)
Input must be same value as UI_SRC_ADDR_CFG register
RPHY_SOC(o)
RPHY_PRTY(o)
RPHY_DATA(o)
D1
D1
D2
D2
D3
D3
D4
D4
The cell available (RPHY_CLAV) signal indicates when the device has a
complete cell to send. In Utopia 1 slave (SPHY) mode, RPHY_CLAV is always
driven. Figure 87 above, shows a start-of-transfer for Utopia 1 PHY slave mode.
If a cell is being read in Utopia 1 PHY mode, RPHY_CLAV will be asserted until
the cell has been read out of the source MCFF FIFO and there are no more cells
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL
308
PMC [ PMC-SIERRA, INC ]
