PM73121ꢀAAL1gator II
Data Sheet
PMC-Sierra, Inc.
PMC-980620
,VVXHꢀꢁ
AAL1 SAR Processor
Table 8. T1/E1 Interface Signals (Continued)
Reset
Signals
TLCLK_OUTPUT_EN
Pin #
Type
Description
Value*
79
In
NA
Transmit Line Clock Output Enable controls whether or not the
TL_CLK lines are inputs or outputs between the time of
hardware reset and when the CLK_SOURCE bits are read. If
high, all TL_CLK pins are outputs. If low, all TL_CLK pins are
inputs. There is an internal pull-down resistor, so all TL_CLK
pins are inputs if the pin is not connected. The value of this
input is overwritten by the CLK_SOURCE bits in the LIN_
STR_MODE register (refer to section 7.4.3 “LIN_STR_
MODE” starting on page 126).
*Present when /RESET is asserted and SYS_CLK is being clocked.
ꢇꢆ
PMC [ PMC-SIERRA, INC ]
