PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
single microprocessor to service the XFDL without needing to interface to the
DMA control signals. When TDLUDRE is set to logic 1, an underrun event
causing an interrupt in the XFDL (which is visible on the TDLUDR output pin
when TXDMASIG is logic 1) also causes and interrupt to be generated on the
INTB output. When TDLUDRE is set to logic 0, an underrun event in the
XFDL does not cause an interrupt on INTB.
Upon reset of the E1XC, these bits are cleared to zero.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
74
PMC [ PMC-SIERRA, INC ]
