PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Register 49: Framing Bit Error Count
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
FER[6]
FER[5]
FER[4]
FER[3]
FER[2]
FER[1]
FER[0]
X
X
X
X
X
X
X
X
R
R
R
R
R
R
R
This register indicates the number of framing bit error events that occurred during
the previous accumulation interval. The FER counts are suppressed when the
FRMR has lost frame alignment (OOF in the FRMR Framing Status register is
set).
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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