PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Register 24H: FRMR Framing Status Interrupt Indication
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
OOFI
X
X
X
X
X
X
X
X
R
R
R
R
R
R
R
OOSMFI
OOCMFI
COFAI
FERI
SMFERI
CMFERI
A logic 1 in any bit position of this register indicates which framing status
generated an interrupt by changing state.
OOFI, OOSMFI, OOCMFI, and COFAI:
OOFI, OOSMFI, OOCMFI, and COFAI indicate when the corresponding
status has changed state from logic 0 to logic 1 or vice-versa.
FERI, SMFERI, CMFERI:
FERI, SMFERI, CMFERI indicate when a framing error, signalling multiframe
error or CRC multiframe error event has been detected; these bits will be set
if one or more errors have occurred since the last register read.
The interrupt indications within this register work independently from the interrupt
enable bits, allowing the microprocessor to poll the register to determine the
state of the framer.The contents of this register are cleared to logic 0 after the
register is read; the interrupt is also cleared if it was generated by any of the
Framing Status outputs.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
128
PMC [ PMC-SIERRA, INC ]
