PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Register 23H: FRMR Maintenance/Alarm Status Interrupt Enable
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RRAE
RRMAE
AISDE
0
0
0
0
0
0
0
0
T16AISDE
REDE
AISE
FEBEE
CRCEE
RRAE, RRMAE, AISDE, T16AISDE, REDE and AISE:
A logic one in bits RRAE, RRMAE, AISDE, T16AISDE, REDE or AISE
enables the generation of an interrupt on a change of state of the RRA,
RRMA, AISD, T16AISD, RED and AIS bits of the FRMR Maintenance/Alarm
Status register.
FEBEE:
When the FEBEE bit is a logic one, an interrupt is generated when a logic
zero is received in the Si bits of frames 13 or 15.
CRCEE:
When the CRCEE bit is a logic one, an interrupt is generated when calculated
CRC differs from the received CRC remainder.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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