PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
The tail trace message must include synchronisation because the TTTP does not add
synchronisation. The synchronisation mechanism is different for a 16 bytes message and for a
64 bytes message. When the message is 16 bytes, the synchronisation is based on the MSB of
the tail trace byte. Only one of the 16 bytes has is MSB set high. The byte with its MSB set high
is considered the first byte of the message. When the message is 64 bytes, the synchronisation
is based on the CR/LF (CR = 0Dh, LF = 0Ah) characters of tail trace message. The byte
following the CR/LF bytes is considered the first byte of the message.
To avoid generating an unstable/mismatch message, the TTTP forces the message to all zeros
while the microprocessor updates the internal RAM.
10.14 Transmit High Order Path Processor (THPP)
The Transmit High Order Path Processor (THPP) block inserts the path overhead bytes in the
transmit data stream.
The THPP accumulates the path BIP-8 errors detected by the RHPP during the last receive
frame. The path BIP-8 errors are returned to the far end as path remote error indication (REI-P)
during the next transmit frame. Because the RHPP and the THPP are in two different clock
domains, none, one or two path BIP-8 errors can be accumulated per transmit frame. The
minimum value between the maximum REI-P and the accumulator count is returned as the path
REI in the G1 byte. Optionally, block BIP-8 errors can be accumulated.
The THPP serially inputs all the path overhead (POH) bytes from the TPOH port. The POH bytes
must be input in the same order that they are transmitted (J1, B3, C2, G1, F2, H4, F3, K3 and
N1). TOHCLK is the generated output clock used to provide timing for the TPOH port. TOHCLK
is a nominal 20.736 MHz clock generated by gapping a 25.92 MHz clock. Sampling TPOHRDY
high with the rising edge of TOHCLK identifies the MSB of the first J1 byte. TPOHEN port is used
to validate the byte insertion on a byte per byte basis. When TPOHEN is sampled high on the
MSB of the serial byte, the serial byte is inserted. When TPOHEN is sampled low on the MSB of
the serial byte, the serial byte is discarded.
The THPP calculates the path BIP-8 error detection code on the transmit data stream. The path
BIP-8 byte is calculated on all the payload bytes. The path BIP-8 byte is based on a bit
interleaved parity calculation using even parity. The calculated BIP-8 error detection code is
inserted in the B3 byte of the following frame.
10.15 Transmit Cell and Frame Processor (TCFP)
The Transmit Cell and Frame Processor (TCFP) performs both ATM and PPP processing. It has
the capability to process a single STS-48c (STM-16c) channel. In ATM mode, the TCFP performs
provides rate adaptation via idle/unassigned cell insertion, provides HCS generation and
insertion, and performs ATM cell scrambling. In POS mode, the TCFP provides rate adaptation by
transmitting flag sequences (0x7E) between packets, provides FCS generation and insertion,
performs packet data scrambling, and provides performance monitoring functions.
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PMC [ PMC-SIERRA, INC ]
