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PM5381 参数 Datasheet PDF下载

PM5381图片预览
型号: PM5381
PDF下载: 下载PDF文件 查看货源
内容描述: SATURN用户网络接口,用于2488 Mbit / s的 [SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S]
分类和应用: 网络接口
文件页数/大小: 487 页 / 2424 K
品牌: PMC [ PMC-SIERRA, INC ]
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PMC-Sierra, Inc.  
PRELIMINARY  
PM5381 S/UNI-2488  
DATASHEET  
PMC-2000489  
ISSUE 1  
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S  
The REFCLK reference should be within ±20 ppm to meet the SONET free-run accuracy  
requirements specified in GR-253-CORE.  
The Parallel to Serial Converter (PISO) converts the transmit byte serial stream to a bit serial  
stream. The transmit bit serial stream appears on the TXD+/- PECL outputs.  
10.11 SONET/SDH Transmit Line Interface (STLI)  
The SONET/SDH transmit line interface block properly formats the outgoing 2488 Mbit/s data  
stream. This block interfaces the TRMP to the Tx Line Interface block.  
10.12 Transmit Regenerator Multiplexor Processor (TRMP)  
The Transmit Regenerator and Multiplexor Processor (TRMP) block inserts the transport  
overhead bytes in the transmit data stream.  
The TRMP accumulates the line BIP-8 errors detected by the RRMP during the last receive  
frame. The line BIP-8 errors are returned to the far end as line remote error indication (REI-L)  
during the next transmit frame. Because the RRMP and the TRMP are in two different clock  
domains, none, one or two line BIP-8 errors can be accumulated per transmit frame. The  
minimum value between the maximum REI-L and the accumulator count is returned as the line  
REI-L in the M1 byte of STS-1 (STM-0) #3. Optionally, block BIP-24 errors can be accumulated.  
For STS-48c (STM-16c), the maximum single BIP-8 error count is 0xFF while the maximum block  
BIP-24 error count is 0x10.  
The TRMP serially inputs all the transport overhead (TOH) bytes from the TTOH port. The TOH  
bytes must be input in the same order that they are transmitted (A1, A2, J0/Z0, B1, E1, F1, D1-  
D3, H1-H3, B2, K1, K2, D4-D12, S1/Z1, Z2/M1/Z2 and E2). TTOHCLK is the generated output  
clock used to provide timing for the TTOH port. TTOHCLK is a nominal 20.736 MHz clock  
generated by gapping a 25.92 MHz clock. Sampling TTOHFP high with the rising edge of  
TTOHCLK identifies the MSB of the first A1 byte. TTOHEN port is used to validate the byte  
insertion on a byte per byte basis. When TTOHEN is sampled high on the MSB of the serial byte,  
the serial byte is inserted. When TTOHEN is sampled low on the MSB of the serial byte, the  
serial byte is discarded.  
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use  
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