PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
10.15.5 POS FCS Generator
The FCS Generator performs a CRC-CCITT or CRC-32 calculation on the whole POS frame,
before byte stuffing and data scrambling. A parallel implementation of the CRC polynomial is
used. The CRC algorithm for the frame checking sequence (FCS) field is either a CRC-CCITT or
CRC-32 function. The CRC-CCITT is two bytes in size and has a generating polynomial g(X) = 1
5
12
16
+ X + X + X . The CRC-32 is four bytes in size and has a generating polynomial g(X) = 1 +
2
4
5
7
8
10
11
12
16
22
23
26
32
X + X + X + X + X + X + X + X + X + X + X + X + X + X . The first FCS
bit transmitted is the coefficient of the highest term. When transmitting a packet from the Transmit
FIFO, the FCS Generator appends the result after the last data byte, before the closing flag.
Note that the Frame Check Sequence is the one's complement of the CRC register after
calculation ends. FCS calculation and insertion can be disabled.
Figure 16: CRC Generator
g1
g2
gn-1
Message
D0
D1
Dn-1
. . .
+
+
+
+
MSB
Parity Check Digits
LSB
An error insertion mechanism is provided for system diagnosis purposes. Error insertion is
performed by inverting the resulting FCS value, before transmission. This should cause an FCS
Error at the far end.
10.15.6 POS Byte Stuffing
The PPP Frame generator provides transparency by performing byte stuffing. This operation is
done after the FCS calculation. Two characters are being escaped, the Flag Sequence (0x7E)
and the Escape Character itself (0x7D). When a character is being escaped, it is XORed with
0x20 before transmission and preceded by the Control Escape (0x7D) character.
Table 6: Byte Stuffing
Original
Escaped
7D-5E
7D-5D
7D-7E
7E (Flag Sequence)
7D (Control Escape)
Abort Sequence
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
78
PMC [ PMC-SIERRA, INC ]
