PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Table 5: Z0/National growth bytes definition for row #1
TRMP mode
Type
Z0
Z0DEF = 1
Z0DEF = 0
From STS-1/STM-0 #1 to #12
None
STS-48c (STM-16)
slave mode
From STS-1/STM-0 #1 to #4
From STS-1/STM-0 #5 to #12
National
The H1, H2, B1 and B2 bytes input from the TTOH port are inserted or are used as a mask to
toggle bits in the corresponding H1, H2, B1 and B2 bytes depending on the HMASK, B1MASK
and B2MASK register bits of the TRMP Error Insertion register. When the HMASK, B1MASK or
B2MASK register bit is set low and TTOHEN is sampled high on the MSB of the serial H1, H2, B1
or B2 byte, the serial byte is inserted in place of the corresponding byte. When the HMASK,
B1MASK or B2MASK register bit is set high and TTOHEN is sampled high on the MSB of the
serial H1, H2, B1 or B2 byte, the serial byte is xor with the corresponding path payload pointer
(already in the data stream) or the calculated BIP-8 byte before being inserted.
The TRMP inserts the APS bytes detected by the RRMP during the last receive frame. The APS
bytes are returned to the far end by the TRMP during the next transmit frame. Because the
RRMP and the TRMP are in two different clock domains, none, one or two APS bytes can be
sampled per transmit frame. The last received APS bytes are transmitted.
The TRMP inserts the line remote defect indication (RDI-L) into the data stream. When line RDI
must be inserted, the 110 pattern is inserted in bits 6, 7 and 8 of the K2 byte of STS-1 (STM-0)
#1. Line RDI insertion has priority over TOH byte insertion. The TRMP also inserts the line alarm
indication signal (AIS-L) into the data stream. When line AIS must be inserted, all ones are
inserted in the line overhead and in the payload (all bytes of the frame except the section
overhead bytes). Line AIS insertion has priority over line RDI insertion and TOH byte insertion.
The TRMP calculates the line BIP-8 error detection codes on the transmit data stream. One line
BIP-8 error detection code is calculated for each of the constituent STS-1 (STM-0). The line BIP-
8 byte is calculated on the unscrambled bytes of the STS-1 (STM-0) except for the 9 SOH bytes.
The line BIP-8 byte is based on a bit interleaved parity calculation using even parity. For each
STS-1 (STM-0), the calculated BIP-8 error detection code is inserted in the B2 byte of the
following frame before scrambling. The TRMP optionally scrambles the transmit data stream.
The TRMP calculates the section BIP-8 error detection code on the transmit data stream. The
section BIP-8 byte is calculated on the scrambled bytes of the complete frame. The section BIP-
8 byte is based on a bit interleaved parity calculation using even parity. The calculated BIP-8
error detection code is inserted in the B1 byte of STS-1 (STM-0) #1 of the following frame before
scrambling.
10.13 Transmit Tail Trace Processor (TTTP)
The Transmit Tail Trace Processor (TTTP) block generates the tail trace messages to be
transmitted. The TTTP can generate a 16 or 64 byte tail trace message. The message is source
from an internal RAM and must have been previously written by an external micro processor.
Optionally, the tail trace message can be reduced to a single continuous tail trace byte.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
75
PMC [ PMC-SIERRA, INC ]
