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PM5380-BI 参数 Datasheet PDF下载

PM5380-BI图片预览
型号: PM5380-BI
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 440 页 / 2124 K
品牌: PMC [ PMC-SIERRA, INC ]
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S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet  
Released  
10.2.1 Framer  
The Framer Block determines the in-frame/out-of-frame status of the receive stream. While in-  
frame, the framing bytes (A1, A2) in each frame are compared against the expected pattern.  
Out-of-frame is declared when four consecutive frames containing one or more framing pattern  
errors have been received.  
While out of frame, the CRSI block monitors the bit-serial STS-3c/STM-1 data stream for an  
occurrence of the framing pattern (A1, A2). The CRSI informs the RSOP Framer block when  
three A1 bytes followed by three A2 bytes has been detected to reinitializes the frame byte  
counter to the new alignment. The Framer block declares frame alignment on the next  
SONET/SDH frame when either all A1 and A2 bytes are seen error-free or when only the first  
A1 byte and the first four bits of the last A2 byte are seen error-free depending upon the selected  
framing algorithm.  
Once in frame, the Framer block monitors the framing pattern sequence and declares out of  
frame (OOF) when one or more bits errors in each framing pattern are detected for four  
consecutive frames. Again, depending upon the algorithm either all framing bytes are examined  
for bit errors each frame, or only the first A1 byte and the first four bits of the last A2 byte are  
examined for bit errors each frame.  
10.2.2 Descramble  
The Descramble Block utilizes a frame synchronous descrambler to process the receive stream.  
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The generating polynomial is x + x + 1 and the sequence length is 127. Details of the  
descrambling operation are provided in the references. Note that the framing bytes (A1 and A2)  
and the trace/growth bytes (J0/Z0) are not descrambled. A register bit is provided to disable the  
descrambling operation.  
10.2.3 Data Link Extract  
The Data Link Extract Block extracts the section data communication channel (bytes D1, D2,  
and D3) from an STS-3c/STM-1 stream. The extracted bytes are serialized and are output on  
the associated RDCC signal at a nominal 192 kbit/s rate. Timing for downstream processing of  
the data communication channel is provided by the RDCLK signal that is also output by the  
Data Link Extract Block. RDCLK is derived from a 216 kHz clock that is gapped to yield an  
average frequency of 192 kHz. RDCC is updated with timing aligned to RDCLK.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC- 2010299, Issue 2  
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