S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Notes on Pin Description:
1. All digital inputs and bi-directional signals present minimum capacitive loading and operate at TTL
logic levels except the inputs marked as Analog or differential pseudo-ECL (PECL).
2. All digital outputs and bi-directional signals have 8mA drive strength.
3. The differential pseudo-ECL inputs and outputs should be terminated in a passive network and
interface at PECL levels as described in the Operations section.
4. It is mandatory that every digital ground pin (VSS) be connected to the printed circuit board ground
plane to ensure reliable device operation.
5. It is mandatory that every digital power pin (VDDI and VDD sets) be connected to printed circuit board
power planes to ensure reliable device operation.
6. All analog power and ground pins can be sensitive to noise. They must be isolated from the digital
power and ground. Care must be taken to correctly decouple these pins. Please refer to the
Operation section for more information.
7. Due to ESD protection structures in the pads it is necessary to exercise caution when powering a
device up or down. ESD protection devices behave as diodes between power supply pins and from
I/O pins to power supply pins. Under extreme conditions it is possible to damage these ESD
protection devices or trigger latch up. Please adhere to the recommended power supply sequencing
as described in the Operation section of this document.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
65
PMC [ PMC-SIERRA, INC ]
