S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x0A1, 0x1A1, 0x2A1, 0x3A1, 0x4A1, 0x5A1, 0x6A1, 0x7A1:
RXFP Configuration/Interrupt Enable
Bit
Type
Function
Unused
Unused
MINLE
MAXLE
ABRTE
FCSE
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
FOVRE
Reserved
FOVRE:
The FOVRE bit enables the generation of an interrupt due to a channel buffer overrun error
condition. When FOVRE is set high, the interrupt is enabled.
FCSE:
The FCSE bit enables the generation of an interrupt due to the detection of an FCS error.
When FCSE is set high, the interrupt is enabled.
ABRTE:
The Abort Packet Enable bit enables the generation of an interrupt due to the reception of an
aborted packet. When ABRTE is set high, the interrupt is enabled.
MAXLE:
The Maximum Length Packet Enable bit enables the generation of an interrupt due to the
reception of an packet exceeding the programmable maximum packet length. When
MAXLE is set high, the interrupt is enabled.
MINLE:
The Minimum Length Packet Enable bit enables the generation of an interrupt due to the
reception of an packet that is smaller than the programmable minimum packet length.
When MINLE is set high, the interrupt is enabled.
Reserved:
The reserved bit must be programmed to logic zero for proper operation.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
250