S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x056, 0x156, 0x256, 0x356, 0x456, 0x556, 0x656, 0x756:
SPTB Indirect Access Trigger Register
Bit
Type
R
R/W
Function
BUSY
RWB
Unused
Unused
Unused
Unused
Unused
Unused
Default
0
0
X
X
X
X
X
X
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
BUSY:
The BUSY bit reports whether a previously initiated indirect read or write to a message
buffer has been completed. BUSY is set to a logic one immediately upon writing to the
SPTB Indirect Address register, and stays high until the initiated access is completed. This
register should be polled to determine when new data is available in the SPTB Indirect Data
register.
RWB:
The access control bit (RWB) selects between an indirect read or write access to the
selected path trace buffer (receive or transmit as determined by the RRAMACC bit). When
RWB is a logic one, a read access is initiated. The addressed location’s contents are placed
in the SPTB Indirect Data register. When RWB is a logic zero, a write access is initiated.
The data in the SPTB Indirect Data register is written to the addressed location in the
selected buffer.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
212