STANDARD PRODUCT
PM5365 TEMAP
DATASHEET
PMC-1991148
ISSUE 3
HIGH DENSITY VT/TU MAPPER
AND M13 MULTIPLEXER
path BIP-2. The generator also inserts FEBE, RDI and enhanced RDI in the V5
byte. Software can force AIS insertion on a per tributary basis.
A SONET/SDH mapper maps and demaps up to 28 T1s, 21 E1s or a single DS3
into a STS-1 SPE, TUG3 or VC3 through an elastic store. The fixed stuff (R) bits
are all set to zeros or ones under microprocessor control. The bit asynchronous
demapper performs majority vote C-bit decoding to detect stuff requests for T1,
E1 and DS3 asynchronous mappings. The VT1.5/VT2/TU-11/TU-12 mapper
uses an elastic store and a jitter attenuator capability to minimize jitter
introduced via bit stuffing.
The TEMAP is configured, controlled and monitored via a generic 8-bit
microprocessor bus through which all internal registers are accessed. All
sources of interrupts can be masked and acknowledged through the
microprocessor interface.
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use
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