STANDARD PRODUCT
PM5365 TEMAP
DATASHEET
PMC-1991148
ISSUE 3
HIGH DENSITY VT/TU MAPPER
AND M13 MULTIPLEXER
Pin Name
Type Pin Function
No.
XCLK/VCLK
Input E20
Crystal Clock Input (XCLK). This 24 times T1 or E1
clock provides timing for many of the T1 and E1
portions of TEMAP. XCLK is nominally a 37.056 MHz
± 32ppm, 50% duty cycle clock when configured for T1
modes and is nominally a 49.152 MHz ± 32ppm, 50%
duty cycle clock when configured for E1 modes.
This clock is required for all operating modes of the
TEMAP.
Test Vector Clock (VCLK). This signal is used during
production testing.
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use
28
PMC [ PMC-SIERRA, INC ]
