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PM5365-PI 参数 Datasheet PDF下载

PM5365-PI图片预览
型号: PM5365-PI
PDF下载: 下载PDF文件 查看货源
内容描述: VT / TU映射器和M13多路复用器 [VT/TU MAPPER AND M13 MULTIPLEXER]
分类和应用: 复用器
文件页数/大小: 244 页 / 1139 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM5365 TEMAP  
DATASHEET  
PMC-1991148  
ISSUE 3  
HIGH DENSITY VT/TU MAPPER  
AND M13 MULTIPLEXER  
Sꢀ Line side interface is from the SONET/SDH Drop bus via the VT2 or TU-12  
demapper.  
Sꢀ System side interface is either serial clock and data or SBI bus.  
Sꢀ Provides external access for up to two de-jittered recovered E1 clocks.  
SONET/SDH Tributary Path Processing Section:  
Sꢀ Interfaces with a byte wide Telecom Add/Drop bus, interfacing directly with  
the PM5362 TUPP-PLUS and PM5342 SPECTRA-155.  
Sꢀ Compensates for pleisiochronous relationships between incoming and  
outgoing higher level (STS-1, AU4, AU3) synchronous payload envelope  
frame rates through processing of the lower level tributary pointers.  
Sꢀ Optionally frames to the H4 byte in the path overhead to determine tributary  
multi-frame boundaries and generates change of loss-of-frame status  
interrupts.  
Sꢀ Detects loss of pointer (LOP) and re-acquisition for each tributary and  
optionally generates interrupts.  
Sꢀ Detects tributary path alarm indication signal (AIS) and return to normal state  
for each tributary and optionally generates interrupts  
Sꢀ Detects tributary elastic store underflow and overflow and optionally  
generates interrupts.  
Sꢀ Provides individual tributary path signal label register that hold the expected  
label and detects tributary path signal label mismatch alarms (PSLM) and  
return to matched state for each tributary and optionally generates interrupts.  
Sꢀ Detects tributary path signal label unstable alarms (PSLU) and return to  
stable state for each tributary and optionally generates interrupts.  
Sꢀ Detects assertion and removal of tributary extended remote defect indications  
(RDI) for each tributary and optionally generates interrupts.  
Sꢀ Calculates and compares the tributary path BIP-2 error detection code for  
each tributary and configurable to accumulate the BIP-2 errors on block or bit  
basis in internal registers.  
Sꢀ Allows insertion of all-zeros or all-ones tributary idle code with unequipped  
indication and valid pointer into any tributary under SW control.  
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use  
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