PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Figure 22 shows a simple four STS-3 case that outlines the function of the
various input signals associated with the ID[7:0] input bus when the TUPP+622 is
in STM-4 (STS-12) input interface mode (IHSMODEB set low). Data on ID[7:0] is
sampled on the rising edge of HSCLK. The bytes forming the STS-1 synchronous
payload envelopes are identified by the IPL[1] signal being set high. The IC1J1[1]
signal pulses high while IPL[1] is low to mark the position of the first C1 byte in
the STS-12 transport envelope. The IC1J1[1] signal is set high for one HSCLK
periods while IPL[1] is also set high to mark the J1 byte of each STS-1 SPE. In
this diagram, IC1J1[1] is shown to be marking the J1 byte of STS-3 #1 STS-1 #1.
The ITMF[1] signal is selectable to mark the third byte after J1 of the first tributary
in an STS-1 SPE or the H4 byte in the last (fourth) frame of a tributary
multiframe. In this diagram, ITMF[1] is shown to be marking the V1 byte of the
first tributary multiframe in STS-3 #1 STS-1 #1. This diagram also applies to the
AU3 mode as it is equivalent to the STS-1 mode, except for nomenclature.
Figure 22
- STM-4 Input Bus Timing - STS-1/AU3 Case
HSCLK
ITMF[1]
(ITMFH4=0)
STS-3 #1
STS-1 #1
POH
STS-3 #3
STS-1 #2
PSO
STS-3 #1
STS-1 #1
STS-3 #1 STS-3 #2 STS-3 #3 STS-3 #4
J1
V1
STS-1 #3's
STS-1 #1's
SPE #2
TOH #2
C1
SPE #1
BYT 262
SPE #3
BYT 262
SPE #1
BYT 1
SPE #2
BYT 1
SPE #3
BYT 1
TOH #1
C1
TOH #3
C1
SPE #1
SPE #2
SPE #3
ID[7:0]
IPL[1]
BYT 262
BYT 263
BYT 263 BYT 263
STS-1 #2's
PJE
IC1J1[1]
IDP[1]
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
394
PMC [ PMC-SIERRA, INC ]
