欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM5363-BI 参数 Datasheet PDF下载

PM5363-BI图片预览
型号: PM5363-BI
PDF下载: 下载PDF文件 查看货源
内容描述: SONET / SDH支路单元荷载处理器, 622兆比特/ s接口 [SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S INTERFACES]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 459 页 / 3435 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM5363-BI的Datasheet PDF文件第408页浏览型号PM5363-BI的Datasheet PDF文件第409页浏览型号PM5363-BI的Datasheet PDF文件第410页浏览型号PM5363-BI的Datasheet PDF文件第411页浏览型号PM5363-BI的Datasheet PDF文件第413页浏览型号PM5363-BI的Datasheet PDF文件第414页浏览型号PM5363-BI的Datasheet PDF文件第415页浏览型号PM5363-BI的Datasheet PDF文件第416页  
PM5363 TUPP+622  
TUPP+622  
DATASHEET  
PMC-1981421  
ISSUE 4  
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S  
INTERFACES  
14  
FUNCTIONAL TIMING  
The timing of the TUPP+622 STM-1 input signals is illustrated in Figure 18 where  
n is {1, 2, 3, 4}. This diagram shows a simple STS-3 case that outlines the  
function of the various input signals associated with each of the four input buses  
when the TUPP+622 is in STM-1 (STS-3) input interface mode (IHSMODEB set  
high). Data on ID[7:0] (ID[15:8], ID[23:16], ID[31:24]) is sampled on the rising  
edge of SCLK. The bytes forming the three STS-1 synchronous payload  
envelopes are identified by the IPL[1] (IPL[2], IPL[3], IPL[4]) signal being set  
high. The IC1J1[1] (IC1J1[2], IC1J1[3], IC1J1[4]) signal pulses high while IPL[1]  
(IPL[2], IPL[3], IPL[4]) is low to mark the position of the first C1 byte in the STS-3  
transport envelope. The IC1J1[1] (IC1J1[2], IC1J1[3], IC1J1[4]) signal is set high  
for three SCLK periods while IPL[1] (IPL[2], IPL[3], IPL[4]) is also set high to  
mark the J1 bytes of each STS-1 SPE. The ITMF[1] (ITMF[2], ITMF[3], ITMF[4])  
signal is selectable to mark the third byte after J1 of the first tributary in an STS-1  
SPE or the H4 byte in the last (fourth) frame of a tributary multiframe. In this  
diagram, ITMF[1] (ITMF[2], ITMF[3], ITMF[4]) is shown to be marking the last H4  
byte of the tributary multiframe in STS-1 #1 and STS-1 #3. The H4 byte in STS-1  
#2, as shown, is not last in the tributary multiframe. In this simple example, all  
STS-1 SPEs are aligned to the STS-3 transport envelope such that the J1 bytes  
directly follow the C1 bytes and no STS-1 pointer justification events are  
occurring. Other alignments are possible. The four input buses can be  
independently configured to handle STS-1/AU3 or AU4 and the SPE/VC  
alignments of the input buses may be different. However, the transport frame  
alignments of the four input buses must be identical. That is, the C1 portion of all  
the IC1J1[4:1] signals must be coincident. This diagram also applies to the AU3  
mode as it is equivalent to the STS-1 mode, except for nomenclature.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
389