PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Register 102H, 202H, 302H: RTOP, TU3 or TU #1 in TUG2 #1, Expected Path
Signal Label
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
EPSL[7]
EPSL[6]
EPSL[5]
EPSL[4]
EPSL[3]
EPSL[2]
EPSL[1]
EPSL[0]
0
0
0
0
0
0
0
0
In TU3 mode (TU3 bit in VTPP Configuration register set high), this register
configures the expected path signal label of the TU3 mapped into a TUG3
handled by the RTOP. Out of TU3 mode, this register configures the expected
path signal label of TU #1 in TUG2 #1.
EPSL[7:0]:
In TU3 mode, the EPSL[7:0] bits specifies the expected path signal label of
the TU3 stream. Out of TU3 mode, EPSL[2:0] specifies the expected path
signal label of tributary TU #1 in TUG2 #1. The expected PSL is compared
with the accepted PSL to determine the PSLM state.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
211
PMC [ PMC-SIERRA, INC ]
