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PM5363-BI 参数 Datasheet PDF下载

PM5363-BI图片预览
型号: PM5363-BI
PDF下载: 下载PDF文件 查看货源
内容描述: SONET / SDH支路单元荷载处理器, 622兆比特/ s接口 [SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S INTERFACES]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 459 页 / 3435 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM5363 TUPP+622  
TUPP+622  
DATASHEET  
PMC-1981421  
ISSUE 4  
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S  
INTERFACES  
V5 byte is set high for five or ten consecutive multiframes as determined by  
the RDI10 bit in the RTOP and RTTB Configuration registers (addresses 0CH,  
0DH, and 0EH). RFIV is set low when the RFI bit is set low for five or ten  
consecutive multiframes as determined by the RDI10 bit. RFIV is not used  
when TU3 mode is enabled.  
ERDIV[2:0]:  
The ERDIV[2:0] bits indicates the extended remote defect indication status of  
tributary TU #1 in TUG2 #1 or the TU3 mapped in a TUG3 when RDIZ7EN is  
set high. The ERDIV[2:0] bits are set to a new code when the same code in  
the extended RDI bits of the Z7 byte or the G1 byte is seen for five or ten  
consecutive multiframes (frames in TU3 mode) as determined by the RDI10  
bit in the RTOP and RTTB Configuration registers (addresses 0CH, 0DH, and  
0EH).  
PSLMV:  
The PSLMV bit indicates the path signal mismatch status of tributary TU #1 in  
TUG2 #1 or TU3. PSLMV is set high when the accepted PSL differs from the  
provisioned value. PSLMV is set low when the accepted PSL has the same  
value as the provisioned one.  
PSLUV:  
The PSLUV bit indicates the path signal unstable status of tributary TU #1 in  
TUG2 #1 or TU3. The PSL unstable counter is incremented if the PSL of the  
current multiframe differs from that in the previous multiframe. The counter is  
cleared to zero when the same PSL is received for five consecutive  
multiframes. The tributary PSL unstable alarm is asserted and PSLUV set  
high when the unstable counter reaches five. The PSL unstable alarm is  
negated and PSLUV set low when the unstable counter is cleared.  
PDIVEN  
The PDIVEN bit controls the insertion of tributary path defect indication for  
tributary TU #1 in TUG2 #1 or TU3 in the receive alarm port (RAD). When  
PDIVEN is set high, PDI-V is asserted regardless of the state of the path  
signal label. When PDIVEN is set low, PDI-V is asserted if the incoming path  
signal label matches the PDI code in the PDI[2:0] bit of the corresponding  
RTOP Configuration register.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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