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PM5356-BI 参数 Datasheet PDF下载

PM5356-BI图片预览
型号: PM5356-BI
PDF下载: 下载PDF文件 查看货源
内容描述: [ATM Network Interface, 1-Func, CMOS, PBGA304, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 278 页 / 1562 K
品牌: PMC [ PMC-SIERRA, INC ]
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PMC-Sierra, Inc.  
PM5356  
S/UNI-622-MAX  
DATASHEET  
S/UNI-622-MAX  
PMC-1980589  
ISSUE 5  
SATURN USER NETWORK INTERFACE (622-MAX)  
with the BIP-8 code extracted from the B1 byte of the following frame. Differences indicate that a  
section level bit error has occurred. Up to 64000 (8 x 8000) bit errors can be detected per  
second. The Error Monitor Block accumulates these section level bit errors in a 16-bit saturating  
counter that can be read via the microprocessor interface. Circuitry is provided to latch this  
counter so that its value can be read while simultaneously resetting the internal counter to 0 or 1,  
if appropriate, so that a new period of accumulation can begin without loss of any events. It is  
intended that this counter be polled at least once per second so as not to miss bit error events.  
Loss of Signal  
The Loss of Signal Block monitors the scrambled data of the receive stream for the absence of  
1's or 0s. When 20 ± 3 µs of all zeros patterns or all ones patterns are detected, a loss of signal  
(LOS) is declared. Loss of signal is cleared when two valid framing words are detected and  
during the intervening time, no loss of signal condition is detected. The LOS signal is optionally  
reported on the RALRM output pin when enabled by the LOSEN Receive Alarm Control Register  
bit.  
Loss of Frame  
The Loss of Frame Block monitors the in-frame / out-of-frame status of the Framer Block. A loss  
of frame (LOF) is declared when an out-of-frame (OOF) condition persists for 3 ms. The LOF is  
cleared when an in-frame condition persists for a period of 3 ms. To provide for intermittent out-  
of-frame (or in-frame) conditions, the 3 ms timer is not reset to zero until an in-frame (or out-of-  
frame) condition persists for 3 ms. The LOF and OOF signals are optionally reported on the  
RALRM output pin when enabled by the LOFEB and OOFEN Receive Alarm Control Register  
bits.  
10.3 Receive Line Overhead Processor (RLOP)  
The Receive Line Overhead Processor (RLOP) provides line level alarm and performance  
monitoring.  
Line RDI Detect  
The Line RDI Detect Block detects the presence of Line Remote Defect Indication (LRDI) in the  
receive stream. Line RDI is declared when a 110 binary pattern is detected in bits 6, 7, and 8 of  
the K2 byte, for three or five consecutive frames. Line RDI is removed when any pattern other  
than 110 is detected in bits 6, 7, and 8 of the K2 byte for three or five consecutive frames. The  
LRDI signal is optionally reported on the RALRM output pin when enabled by the LRDIEN  
Receive Alarm Control Register bit.  
Line AIS Detect  
The Line AIS Block detects the presence of a Line Alarm Indication Signal (LAIS) in the receive  
stream. Line AIS is declared when a 111 binary pattern is detected in bits 6, 7, and 8 of the K2  
byte, for three or five consecutive frames. Line AIS is removed when any pattern other than 111  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERSINTERNAL USE  
43  
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