PMC-Sierra, Inc.
PM5356
S/UNI-622-MAX
DATASHEET
S/UNI-622-MAX
PMC-1980589
ISSUE 5
SATURN USER NETWORK INTERFACE (622-MAX)
10.2 Receive Section Overhead Processor (RSOP)
The Receive Section Overhead Processor (RSOP) provides frame synchronization,
descrambling, section level alarm and performance monitoring.
Framer
The Framer Block determines the in-frame/out-of-frame status of the receive stream. While in-
frame, the framing bytes (A1, A2) in each frame are compared against the expected pattern. Out-
of-frame is declared when four consecutive frames containing one or more framing pattern errors
have been received.
While out of frame, the CRSI-622 block monitors the bit-serial STS-12c/STM-4-4c data stream for
an occurrence of the framing pattern (A1, A2). The CRSI-622 informs the RSOP Framer block
when three A1 bytes followed by three A2 bytes has been detected to reinitializes the frame byte
counter to the new alignment. The Framer block declares frame alignment on the next
SONET/SDH frame when either all A1 and A2 bytes are seen error-free or when only the first A1
byte and the first four bits of the last A2 byte are seen error-free depending upon the selected
framing algorithm.
Once in frame, the Framer block monitors the framing pattern sequence and declares out of
frame (OOF) when one or more bits errors in each framing pattern are detected for four
consecutive frames. Again, depending upon the algorithm either 24 framing bytes are examined
for bit errors each frame, or only the first A1 byte and the first four bits of the last A2 byte are
examined for bit errors each frame.
When the parallel line interface PIN[7:0] is used, upstream circuitry monitors the receive stream
for an occurrence of the three A1 bytes followed by three A2 bytes framing pattern while out-of-
frame. The upstream circuitry is expected to pulse input FPIN when the third A2 byte has been
detected. RSOP monitors the receive data stream on PIN[7:0] for the framing pattern as before.
Once in frame, RSOP monitors the framing pattern sequence and sets the OOF pin when one or
more bit errors in each framing pattern are detected for four consecutive frames.
Descramble
The Descramble Block utilizes a frame synchronous descrambler to process the receive stream.
7
6
The generating polynomial is x + x + 1 and the sequence length is 127. Details of the
descrambling operation are provided in the references. Note that the framing bytes (A1 and A2)
and the trace/growth bytes (J0/Z0) are not descrambled. A register bit is provided to disable the
descrambling operation.
Error Monitor
The Error Monitor Block calculates the received section BIP-8 error detection code (B1) based on
the scrambled data of the complete STS-12c/STM-4-4c frame. The section BIP-8 code is based
on a bit interleaved parity calculation using even parity. The calculated BIP-8 code is compared
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