Pm49FL002 / 004
PMC
REGISTERS (CONTINUED)
Table 7. Block Locking Register Definition
Bit
Function
Reserved
7:3
Read-Lock
2
1
0
"1" = Prevents read operations in the block where set.
"0" = Normal operation for reads in the block where clear. Default state.
Lock-Down
"1" = Prevents further set or clear operations to the Write-Lock and Read-Lock bits. Lock-
Down only can be set, but not cleared. The block will remain locked-down until reset (with
RST# or INIT#), or until the device is power-on reset.
"0" = Normal operation for Write-Lock and Read-Lock bit altering in the block where clear.
Default state.
Write-Lock
"1" = Prevents program or erase operations in the block where set. Default state.
"0" = Normal operation for programming and erase in the block where clear.
Data
Bit[7:3]
00000
00000
00000
00000
00000
00000
00000
00000
Bit 2
Bit 1
Bit 0
Resulting Block State
Full access.
00h
01h
02h
03h
04h
05h
06h
07h
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Write locked. Default state at power-up.
Locked open (full access locked down).
Write-locked down.
Read locked.
Read and write locked.
Read-locked down.
Read-locked and write-locked down.
Issue Date: December, 2003 Rev: 1.4
Programmable Microelectronics Corp.
24
PMC [ PMC-SIERRA, INC ]
