PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Address
Register
19H
1AH
1BH
1CH
1DH
1EH
1FH
20H
21H
22H
23H
24H
25H
26H
27H
28H
29H
2AH
2BH
2CH
2DH
2EH
2FH
30H
31H
32H
33H
34H
DJAT Reference Clock Divisor (N1) Control
DJAT Output Clock Divisor (N2) Control
DJAT Configuration
ELST Configuration
ELST Interrupt Enable/Status
ELST Trouble Code
ELST Reserved
FRMR Configuration
FRMR Interrupt Enable
FRMR Interrupt Status
FRMR Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RBOC Enable
RBOC Code Status
ALMI Configuration
ALMI Interrupt Enable
ALMI Interrupt Status
ALMI Alarm Detection Status
TPSC Configuration
TPSC µP Access Status
TPSC Channel Indirect Address/Control
TPSC Channel Indirect Data Buffer
XFDL Configuration
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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