PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Register 46H: XIBC Control
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
EN
UF
0
0
Unused
Unused
Unused
Unused
CL1
X
X
X
X
0
R/W
R/W
CL0
0
EN:
The EN bit controls whether the Inband Code is transmitted or not. A logic 1
in the EN bit position enables transmission of inband codes; a logic 0 in the
EN bit position disables inband code transmission.
UF:
The UF bit controls whether the code is transmitted framed or unframed. A
logic 1 in the UF bit position selects unframed inband code transmission; a
logic 0 in the UF bit position selects framed inband code transmission. Note:
the UF register bit controls the XBAS directly and is not qualified by the EN
bit. When UF is set to logic 1, the XBAS is disabled and no framing is
inserted regardless of the setting of EN. The UF bit should only be written to
logic 1 when the EN bit is set, and should be cleared to logic 0 when the EN
bit is cleared.
CL1, CL0:
The bit positions CL[1:0] (bits 1 & 0) of this register indicate the length of the
inband loopback code sequence, as follows:
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
163
PMC [ PMC-SIERRA, INC ]
