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PM4328-PI 参数 Datasheet PDF下载

PM4328-PI图片预览
型号: PM4328-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度T1 / E1成帧器,集成M13多路复用器 [HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER]
分类和应用: 复用器数字传输控制器电信集成电路电信电路异步传输模式ATM
文件页数/大小: 250 页 / 1399 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4328 TECT3  
DATASHEET  
PMC-2011596  
ISSUE 1  
HIGH DENSITY T1/E1 FRAMER  
AND M13 MULTIPLEXER  
FIGURE 53: FRAMER MODE DS3 TRANSMIT INPUT STREAM WITH  
TGAPCLK....................................................................................185  
FIGURE 54: FRAMER MODE DS3 RECEIVE OUTPUT STREAM.................186  
FIGURE 55: FRAMER MODE DS3 RECEIVE OUTPUT STREAM WITH  
RGAPCLK....................................................................................186  
FIGURE 56: SBI DROP BUS T1 FUNCTIONAL TIMING ................................187  
FIGURE 57: SBI DROP BUS DS3 FUNCTIONAL TIMING .............................187  
FIGURE 58: SBI ADD BUS JUSTIFICATION REQUEST FUNCTIONAL TIMING  
.....................................................................................................188  
FIGURE 59: EGRESS 8.192 MBPS H-MVIP LINK TIMING............................189  
FIGURE 60: INGRESS 8.192 MBPS H-MVIP LINK TIMING...........................189  
FIGURE 61: T1 EGRESS INTERFACE CLOCK MASTER: NXCHANNEL MODE  
.....................................................................................................190  
FIGURE 62: E1 EGRESS INTERFACE CLOCK MASTER : NXCHANNEL MODE190  
FIGURE 63: T1 AND E1 EGRESS INTERFACE CLOCK MASTER: CLEAR  
CHANNEL MODE........................................................................190  
FIGURE 64: T1 EGRESS INTERFACE CLOCK SLAVE: EFP ENABLED MODE  
.....................................................................................................191  
FIGURE 65: E1 EGRESS INTERFACE CLOCK SLAVE : EFP ENABLED MODE  
.....................................................................................................191  
FIGURE 66: T1 EGRESS INTERFACE CLOCK SLAVE: EXTERNAL SIGNALING  
MODE..........................................................................................192  
FIGURE 67: E1 EGRESS INTERFACE CLOCK SLAVE : EXTERNAL  
SIGNALING MODE......................................................................192  
FIGURE 68: T1 EGRESS INTERFACE 2.048 MHZ CLOCK SLAVE: EFP  
ENABLED MODE ........................................................................193  
FIGURE 69: T1 EGRESS INTERFACE 2.048 MHZ CLOCK SLAVE: EXTERNAL  
SIGNALING MODE......................................................................194  
PROPRIETARY AND CONFIDENTIAL  
vii  
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