STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
FIGURE 90: EGRESS INTERFACE TIMING - CLOCK SLAVE: EFP ENABLED
MODE..........................................................................................221
FIGURE 91: EGRESS INTERFACE TIMING - CLOCK SLAVE: EXTERNAL
SIGNALING MODE......................................................................222
FIGURE 92: EGRESS INTERFACE INPUT TIMING - CLOCK MASTER :
NXCHANNEL MODE ...................................................................223
FIGURE 93: EGRESS INTERFACE INPUT TIMING - CLOCK MASTER : CLEAR
CHANNEL MODE........................................................................224
FIGURE 94: EGRESS INTERFACE INPUT TIMING - CLOCK MASTER :
SERIAL DATAAND H-MVIP CCS MODE ....................................225
FIGURE 95: EGRESS INTERFACE INPUT TIMING - CLOCK SLAVE : CLEAR
CHANNEL MODE........................................................................226
FIGURE 96: INGRESS INTERFACE TIMING - CLOCK SLAVE MODES .......228
FIGURE 97: INGRESS INTERFACE TIMING - CLOCK MASTER MODES....229
FIGURE 98: TRANSMIT LINE INTERFACE TIMING ......................................230
FIGURE 99: JTAG PORT INTERFACE TIMING..............................................233
FIGURE 100: 324 PIN PBGA 23X23MM BODY..............................................235
LIST OF TABLES
TABLE 1: E1-FRMR FRAMING STATES ..........................................................60
TABLE 2: REGISTER MEMORY MAP ..............................................................99
TABLE 3: INSTRUCTION REGISTER ............................................................121
TABLE 4: IDENTIFICATION REGISTER.........................................................122
TABLE 5: BOUNDARY SCAN CHAIN .............................................................122
TABLE 6: PMON COUNTER SATURATION LIMITS (E1 MODE) ...................137
TABLE 7: PMON COUNTER SATURATION LIMITS (T1 MODE) ...................137
PROPRIETARY AND CONFIDENTIAL
ix