STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
13.1 DS3 LINE SIDE INTERFACE TIMING .......................................183
13.2 DS3 SYSTEM SIDE INTERFACE TIMING ................................185
13.3 SBI DROP BUS INTERFACE TIMING.......................................187
13.4 SBI ADD BUS INTERFACE TIMING..........................................188
13.5 EGRESS H-MVIP LINK TIMING ................................................188
13.6 INGRESS H-MVIP LINK TIMING...............................................189
13.7 EGRESS SERIAL CLOCK AND DATA INTERFACE TIMING ....190
13.8 INGRESS SERIAL CLOCK AND DATA INTERFACE TIMING ...195
ABSOLUTE MAXIMUM RATINGS........................................................199
D.C. CHARACTERISTICS....................................................................200
MICROPROCESSOR INTERFACE TIMING CHARACTERISTICS......202
TECT3 TIMING CHARACTERISTICS..................................................206
ORDERING AND THERMAL INFORMATION ......................................234
MECHANICAL INFORMATION.............................................................235
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LIST OF FIGURES
FIGURE 1: CHANNELIZED DS3 CIRCUIT EMULATION APPLICATION .........15
FIGURE 2: HIGH DENSITY FRAME RELAY APPLICATION ............................15
FIGURE 3: TECT3 BLOCK DIAGRAM..............................................................17
FIGURE 4: M13 MULTIPLEXER BLOCK DIAGRAM ........................................18
FIGURE 5: DS3 FRAMER ONLY MODE BLOCK DIAGRAM............................19
FIGURE 6: PIN DIAGRAM ................................................................................25
FIGURE 7: CRC MULTIFRAME ALIGNMENT ALGORITHM ............................59
PROPRIETARY AND CONFIDENTIAL
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