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PM4328-PI 参数 Datasheet PDF下载

PM4328-PI图片预览
型号: PM4328-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度T1 / E1成帧器,集成M13多路复用器 [HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER]
分类和应用: 复用器数字传输控制器电信集成电路电信电路异步传输模式ATM
文件页数/大小: 250 页 / 1399 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4328 TECT3  
DATASHEET  
PMC-2011596  
ISSUE 1  
HIGH DENSITY T1/E1 FRAMER  
AND M13 MULTIPLEXER  
corresponding register values are updated upon generation of the CRC  
submultiframe interrupt.  
This E1-FRMR also detects the V5.2 link ID signal, which is detected when 2 out  
of 3 Sa7 bits are zeros. Upon reception of this Link ID signal, the V52LINKV bit  
of the E1-FRMR Framing Status register is set to logic 1. This bit is cleared to  
logic 0 when 2 out of 3 Sa7 bits are ones.  
Alarm Integration  
The OOF and the AIS defects are integrated, verifying that each condition has  
persisted for 104 ms (± 6 ms) before indicating the alarm condition. The alarm is  
removed when the condition has been absent for 104 ms (± 6 ms).  
The AIS alarm algorithm accumulates the occurrences of AISD (AIS detection).  
The E1-FRMR counts the occurrences of AISD over a 4 ms interval and  
indicates a valid AIS is present when 13 or more AISD indications (of a possible  
16) have been received. Each interval with a valid AIS presence indication  
increments an interval counter which declares AIS Alarm when 25 valid intervals  
have been accumulated. An interval with no valid AIS presence indication  
decrements the interval counter. The AIS Alarm declaration is removed when the  
counter reaches 0. This algorithm provides a 99.8% probability of declaring an  
-3  
AIS Alarm within 104 ms in the presence of a 10 mean bit error rate.  
The Red alarm algorithm monitors occurrences of OOF over a 4 ms interval,  
indicating a valid OOF interval when one or more OOF indications occurred  
during the interval, and indicating a valid in frame (INF) interval when no OOF  
indication occurred for the entire interval. Each interval with a valid OOF  
indication increments an interval counter which declares Red Alarm when 25  
valid intervals have been accumulated. An interval with valid INF indication  
decrements the interval counter; the Red Alarm declaration is removed when the  
counter reaches 0. This algorithm biases OOF occurrences, leading to  
declaration of Red alarm when intermittent loss of frame alignment occurs.  
The E1-FRMR can also be disabled to allow reception of unframed data.  
9.3 Performance Monitor Counters (T1/E1-PMON)  
The Performance Monitor Counters function is provided by the PMON block.  
The block accumulates CRC error events, Frame Synchronization bit error  
events, and Out Of Frame events, or optionally, Change of Frame Alignment  
(COFA) events with saturating counters over consecutive intervals as defined by  
the period of the supplied transfer clock signal (typically 1 second). When the  
transfer clock signal is applied, the PMON transfers the counter values into  
PROPRIETARY AND CONFIDENTIAL  
62  
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