STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
signaling H-MVIP. These elastic stores are identical to the elastic store described
in section 9.7.
When simultaneous SBI with CAS or CCS H-MVIP is selected by the
SYSOPT[2:0] bits in the Global Configuration register these elastic stores
eliminate the need for the H-MVIP interface clock and frame alignment to be
externally synchronized to the rate and frame alignment of the individual links
carries over the SBI interface. Any rate differences between the H-MVIP
interface and an individual link will result in a controlled slip in the CAS or CCS
data relative to the data channels of the individual T1 links.
When simultaneous serial clock and data with CCS H-MVIP is selected these
elastic stores eliminate the need for the H-MVIP interface clock and frame
alignment to be externally synchronized to the rate and frame alignment of the
individual serial streams. As with simultaneous SBI mode, any rate differences
between the H-MVIP interface and an individual link will result in a controlled slip
in the CCS signaling relative to the data channels of the individual T1 links.
9.9 Signaling Extractor (SIGX)
The Signaling Extraction (SIGX) block provides channel associated signaling
(CAS) extraction from an E1 signaling multi-frame or from ESF, and SF T1
formats.
In T1 mode, the SIGX block provides signaling bit extraction from the received
data stream for ESF and SF framing formats. It selectively debounces the bits,
and serializes the results onto the ISIG[x] outputs or CAS bits within the SBI Bus
structure. Debouncing is performed on individual signaling bits. This ISIG[x]
output is channel aligned with ID[x] output, and the signaling bits are repeated for
the entire superframe, allowing downstream logic to reinsert signaling into any
frame, as determined by system timing. The signaling data stream contains the
A,B,C,D bits in the lower 4 channel bit locations (bits 5, 6, 7 and 8) in ESF
framing format; in SF format the A and B bits are repeated in locations C and D
(i.e. the signaling stream contains the bits ABAB for each channel).
The SIGX block contains three superframes worth of signal buffering to ensure
that there is a greater than 95% probability that the signaling bits are frozen in
the correct state for a 50% ones density out-of-frame condition, as specified in
TR-TSY-000170 and BELL PUB 43801. With signaling debounce enabled, the
per-channel signaling state must be in the same state for 2 superframes before
appearing on the serial output stream.
The SIGX block provides one superframe or signaling-multiframe of signal
freezing on the occurrence of slips. When a slip event occurs, the SIGX freezes
PROPRIETARY AND CONFIDENTIAL
66