PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
9.6
T1 Pulse Density Violation Detector (PDVD)
The Pulse Density Violation Detection function is provided by the PDVD block. The block detects
pulse density violations of the requirement that there be N ones in each and every time window of
8(N+1) data bits (where N can equal 1 through 23). The PDVD also detects periods of 16
consecutive zeros in the incoming data. Pulse density violation detection is provided through an
internal register bit. An interrupt is generated to signal a 16 consecutive zero event, and/or a
change of state on the pulse density violation indication.
9.7
Performance Monitor Counters (PMON)
The Performance Monitor block accumulates line code violation events with a saturating counter
over consecutive intervals as defined by the period between writes to trigger registers (typically 1
second). When the trigger is applied, the PMON transfers the counter value into holding registers
and resets the counter to begin accumulating events for the interval. The counter is reset in such
a manner that error events occurring during the reset are not missed. If the holding registers are
not read between successive triggers, an overrun register bit is asserted.
Triggering a counter transfer within an octant is performed by writing to any counter register
location within the octant or by writing to the “Line Interface Interrupt Source #1 / PMON Update”
register.
9.8
Pseudo Random Binary Sequence Generation and Detection (PRBS)
The Pseudo Random Binary Sequence Generator/Detector (PRBS) block is a software selectable
PRBS generator and checker for 211-1, 215-1 or 220-1 PRBS polynomials for use in the T1 and E1
links. PRBS patterns may be generated and detected in either the transmit or receive directions.
The PRBS block can perform an auto synchronization to the expected PRBS pattern and
accumulates the total number of bit errors in two 24-bit counters. The error count accumulates
over the interval defined by successive writes to the Line Interface Interrupt Source #1 / PMON
Update register. When an accumulation is forced, the holding register is updated, and the
counter reset to begin accumulating for the next interval. The counter is reset in such a way that
no events are missed. The data is then available in the Error Count registers until the next
accumulation.
9.9
T1 Inband Loopback Code Generator (XIBC)
The T1 Inband Loopback Code Generator (XIBC) block generates a stream of inband loopback
codes (IBC) to be inserted into a T1 data stream. The IBC stream consists of continuous
repetitions of a specific code. The contents of the code and its length are programmable from 3 to
8 bits.
9.10 Pulse Density Enforcer (XPDE)
The Pulse Density Enforcer function is provided by the XPDE block. Pulse density enforcement
is enabled by a register bit within the XPDE.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
39
PMC [ PMC-SIERRA, INC ]
