PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
BEI:
The BEI bit indicates that one or more bit errors have been detected since the last time this
register was read. When BEI is set to logic 1, at least one bit error has been detected. BEI
is set to logic 0 when this register is read.
XFERI:
The XFERI bit indicates that a transfer of the error count has occurred. A logic 1 in this bit
position indicates that the error counter holding registers has been updated. This update is
initiated by writing to one of the PRBS Error Count register locations, or by writing to the Line
Interface Interrupt Source #1 / PMON Update register. XFERI is set to logic 0 when this
register is read.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
141
PMC [ PMC-SIERRA, INC ]
