PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Register 391H: EXSBI FIFO Underrun Interrupt Status
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
LINK[3]
X
X
X
0
0
0
0
0
R
R
R
R
R
LINK[2]
LINK[1]
LINK[0]
FIFO_UDRI
FIFO_UDRI:
This bit is set when a FIFO underrun is detected. It is cleared when the register is read.
LINK[3:0]:
The LINK[3:0] field is used to specify the LIU octant data stream associated with the FIFO
buffer in which the underrun was detected. LINK[3:0] should only be looked at when
FIFO_UDRI is a ‘1’. Valid values of LINK[3:0] are from 1 to 8.
This register will contain the interrupt status even if the corresponding interrupt enable is not
set.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
96
PMC [ PMC-SIERRA, INC ]
