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PM4314-RI 参数 Datasheet PDF下载

PM4314-RI图片预览
型号: PM4314-RI
PDF下载: 下载PDF文件 查看货源
内容描述: QUAD T1 / E1线路接口装置 [QUAD T1/E1 LINE INTERFACE DEVICE]
分类和应用: 数字传输接口电信集成电路电信电路装置PC
文件页数/大小: 170 页 / 804 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM4314 QDSX  
DATA SHEET  
PMC-950857  
ISSUE 5  
QUAD T1/E1 LINE INTERFACE DEVICE  
DBCTRL:  
The DBCTRL bit is used to pass control of the data bus drivers to the CSB  
pin. When the DBCTRL bit is set to logic one and either IOTST or PMCTST  
are logic one, the CSB pin controls the output enable for the data bus. While  
the DBCTRL bit is set, holding the CSB pin high (IOTST must be set to logic  
1 since CSB high resets PMCTST) causes the QDSX to drive the data bus  
and holding the CSB pin low tristates the data bus. The DBCTRL bit  
overrides the HIZDATA bit. The DBCTRL bit is used to measure the drive  
capability of the data bus driver pads.  
IOTST:  
The IOTST bit is used to allow normal microprocessor access to the test  
registers and control the test mode in each TSB block in the QDSX for board  
level testing. When IOTST is a logic one, all blocks are held in test mode and  
the microprocessor may write to a block's test mode 0 registers to manipulate  
the outputs of the block and consequentially the device outputs (refer to the  
"Test Mode 0 Details" in the "Test Features" section). The IOTST bit is also  
used in conjunction with the HWTST bit as described below.  
HIZIO, HIZDATA:  
The HIZIO and HIZDATA bits control the tristate modes of the QDSX. While  
the HIZIO bit is a logic one, all output pins of the QDSX except the data bus  
and output TDO are held tristate. The microprocessor interface is still active.  
While the HIZDATA bit is a logic one, the data bus is also held in a high-  
impedance state which inhibits microprocessor read cycles. The HIZDATA bit  
is overridden by the DBCTRL bit.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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