PM4314 QDSX
DATA SHEET
PMC-950857
ISSUE 5
QUAD T1/E1 LINE INTERFACE DEVICE
Register 005H, 045H, 085H, and 0C5H: Diagnostics
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
LCVINS
Unused
0
X
X
0
0
0
0
0
R
AUTO_LLB
RXAISEN
TXAISEN
DIALB
R/W
R/W
R/W
R/W
R/W
DMLB
LINELB
These registers allow software to enable the diagnostic modes on each interface.
LCVINS:
The LCVINS bit introduces a single line code violation on the transmitted data
stream. In B8ZS, the violation is generated by masking the first violation
pulse of a B8ZS signature. In AMI, one pulse is sent with the same polarity
as the previous pulse. In HDB3, the violation is generated by causing the
next HDB3-code generated bipolar violation pulse to be of the same polarity
as the previous bipolar violation. See the Operations section for details. To
generate another violation, this bit must first be written to 0 and then to logic
1 again. At least one bit period should elapse between writing LCVINS 0 and
writing it 1 again, or vice versa, if an error is to be successfully inserted.
LCVINS has no effect when TDUAL is set to logic 1.
AUTO_LLB:
When this bit is set, it indicates that the quadrant has been placed in line
loopback mode due to the reception of an inband loopback code while
AUTO_LLB_EN was set. AUTO_LLB is cleared when the quadrant is taken
out of line loopback mode by the reception of an inband loopback deactivate
code, or when AUTO_LLB_EN for that quadrant is set to logic 0. Line
loopback should not be enabled in the QDSX unless DJAT is enabled in the
transmit path.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
63
PMC [ PMC-SIERRA, INC ]
