PM4314 QDSX
DATA SHEET
PMC-950857
ISSUE 5
QUAD T1/E1 LINE INTERFACE DEVICE
Registers 021H, 061H, 0A1H and 0E1H: IBCD Interrupt Enable/Status
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
LBACP
LBDCP
LBAE
LBDE
LBAI
X
X
0
R/W
R/W
R
0
X
X
X
X
R
LBDI
R
LBA
R
LBD
LBACP,LBDCP:
The LBACP and LBDCP bits indicate when the corresponding loopback code
is present during a 39.8 ms interval (DSX-1 applications).
LBAE:
The LBAE bit enables the assertion or deassertion of the inband Loopback
Activate (LBA) detect indication to generate an interrupt on the INTB pin.
When LBAE is set to logic 1, any change in the state of the LBA detect
indication generates an interrupt. When LBAE is set to logic 0, no interrupt is
generated by changes in the LBA detect state.
LBDE:
The LBDE bit enables the assertion or deassertion of the inband Loopback
Deactivate (LBD) detect indication to generate an interrupt on the INTB pin.
When LBDE is set to logic 1, any change in the state of the LBD detect
indication generates an interrupt. When LBDE is set to logic 0, no interrupt is
generated by changes in the LBD detect state.
LBAI,LBDI:
The LBAI and LBDI bits indicate which of the two expected loopback codes
has changed state. A logic 1 in these bit positions indicate that a state
change in that code has occurred; a logic 0 in these bit positions indicate that
no state change has occurred.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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