Signal Ball Description
PLX Technology, Inc.
3.4.2
Hot Plug Signals
The PEX 8532 includes nine Hot Plug signals for each PCI Express port (8 ports x 9 signals/port = 72
total signals), defined in Table 3-4. These signals are active only for downstream ports that are
configured at start-up. (Refer to Chapter 9, “Hot Plug Support,” for further details.)
Table 3-4. PEX 8532 Hot Plug Signals – 72 Balls
Signal Name
Type
Location
Description
Hot Plug Attention LED Output for Station 0 Ports (4 Balls)
Active-Low Slot Control Logic output used to drive the Attention Indicator.
Output is set Low to turn On the LED. Enabled when the Slot Capabilities
register Attention Indicator Present bit is set (offset 7Ch[3]=1) and controlled
by the Slot Control register Attention Indicator Control field (offset 80h[7:6]).
When software writes any value other than 00b (Reserved) to the Attention
Indicator Control field and an Attention_Indicator message is sent to the
downstream device, a Command Completed interrupt can be generated
to notify the Host that the command has been executed.
When the following conditions exist:
K34, W34,
L1, Y1
HP_ATNLED[3:0]#
O
•
•
•
Slot Capabilities register Attention Indicator Present bit is set
(offset 7Ch[3]=1), and
Slot Control register Command Completed Interrupt Enable bit
is not masked (offset 80h[4]=1), and
Slot Control register Hot Plug Interrupt Enable bit is set
(offset 80h[5]=1),
an interrupt (MSI, or INTx message, both mutually exclusive) can be generated
to the Host.
An external current-limiting resistor is required.
Hot Plug Attention LED Output for Station 1 Ports (4 Balls)
Refer to description for HP_ATNLED[3:0]#.
AE33, T33,
AF2, U2
HP_ATNLED[11:8]#
HP_BUTTON[3:0]#
HP_BUTTON[11:8]#
O
Hot Plug Attention Button Input for Station 0 Ports (4 Balls)
Active-Low Slot Control Logic input, directly connected to the Attention
Button, with input assertion status latched in the Slot Status register Attention
Button Pressed field (offset 80h[16]).
Enabled when the Slot Capabilities register Attention Button Present bit is set
(offset 7Ch[0]=1).
When the following conditions exist:
•
•
•
HP_BUTTONx# is not masked (Slot Control register Attention Button
Pressed Enable bit (offset 80h[0]=1), and
Slot Capabilities register Hot Plug Capable bit is set (offset 7Ch[6]=1),
and
Slot Control register Hot Plug Interrupt Enable bit is set
(offset 80h[5]=1),
I
J34, V34,
K1, W1
PUa
an interrupt (MSI, or INTx message, both mutually exclusive) can be
generated, to notify the Host of intended board insertion or removal.
Note: HP_BUTTONx# is internally de-bounced, but must remain stable
for at least 10 ms.
Hot Plug Attention Button Input for Station 1 Ports (4 Balls)
Refer to description for HP_BUTTON[3:0]#.
I
AF33, U33,
AG2, V2
PUa
20
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
PLX [ PLX TECHNOLOGY ]
