Philips Semiconductors
Preliminary specification
Stereo audio codec with SPDIF interface
UDA1355H
15 CHARACTERISTICS
VDD = 3.0 V; Tamb = 25 °C; RL = 5 kΩ; all voltages referenced to ground; unless otherwise specified; note 1.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDDA1
VDDA2
VDDX
DAC supply voltage
ADC supply voltage
2.7
3.0
3.6
V
V
V
2.7
2.7
3.0
3.0
3.6
3.6
crystal oscillator and PLL
supply voltage
VDDI
VDDE
IDDA1
digital core supply voltage
digital pad supply voltage
DAC supply current
2.7
2.7
−
3.0
3.0
3.6
3.6
−
V
V
fs = 48 kHz; power-on
fs = 96 kHz; power-on
fs = 48 kHz; power-down
fs = 96 kHz; power-down
fs = 48 kHz; power-on
fs = 96 kHz; power-on
fs = 48 kHz; power-down
fs = 96 kHz; power-down
fs = 48 kHz; power-on
fs = 96 kHz; power-on
fs = 48 kHz; all on
4.7
mA
mA
µA
−
4.7
−
−
1.7
−
−
1.7
−
µA
IDDA2
ADC supply current
−
10.2
10.4
0.2
−
mA
mA
µA
−
−
−
−
−
0.2
−
µA
IDDX
crystal oscillator and PLL
supply current
−
0.9
−
mA
mA
mA
mA
mA
mA
−
1.2
−
IDDI
digital core supply current
−
18.2
34.7
0.5
−
fs = 96 kHz; all on
−
−
IDDE
digital pad supply current
fs = 48 kHz; all on
−
−
fs = 96 kHz; all on
−
0.7
−
Digital input pins
VIH
HIGH-level input voltage
0.8VDD
−
VDD + 0.5
V
VIL
LOW-level input voltage
hysteresis on pin RESET
input leakage current
input capacitance
−0.5
−
+0.2VDD
V
Vhys(RESET)
−
−
−
0.8
−
−
V
|ILI|
2
µA
pF
Ci
−
10
Digital output pins
VOH
HIGH-level output voltage
IOH = −2 mA
0.85VDD
−
−
3
−
V
VOL
LOW-level output voltage
IOL = 2 mA
−
−
0.4
−
V
IL(max)
maximum output load
(nominal)
mA
Rpu
Rpd
pull-up resistance
16
16
33
33
78
78
kΩ
kΩ
pull-down resistance
3-level input pins
VIH
VIM
VIL
HIGH-level input voltage
0.9VDD
0.4VDD
0
−
−
−
VDD
V
V
V
MID-level input voltage
LOW-level input voltage
0.6VDD
0.5
2003 Apr 10
64