Philips Semiconductors
Product specification
Enhanced octal universal asynchronous
receiver/transmitter (Octal UART)
SCC2698B
BLOCK DIAGRAM
INTERNAL DATA
BUS
8
BLOCK A
BUS BUFFER
D0–D7
CHANNEL A
TRANSMIT HOLD
REGISTER
TIMING
CONTROL
TxDA
TRANSMIT SHIFT
REGISTER
RECEIVE HOLD
REGISTER (3)
OPERATION CONTROL
RDN
WRN
CEN
ADDRESS
DECODE
RxDA
RECEIVE SHIFT
REGISTER
6
A0–A5
RESET
R/W CONTROL
MR1, 2
CR
SR
CSR Rx
CSR Tx
TIMING
CRYSTAL
OSCILLATOR
TxDb
RxDb
CHANNEL B
(AS ABOVE)
X1/CLK
X2
POWER-ON
LOGIC
INPUT PORT
2
MPI0
CHANGE-OF-
STATE
DETECTORS (4)
2
MPIb
IPCR
ACR
OUTPUT PORT
2
MPP1
BLOCK B
(SAME AS A)
FUNCTION SELECT
LOGIC
2
MPP2
2
MPO
OPCR
TIMING
CLOCK
SELECTORS
BLOCK C
(SAME AS A)
COUNTER/
TIMER
ACR
CTUR
CTLR
BLOCK D
(SAME AS A)
INTERRUPT CONTROL
IMR
ISR
INTRAN
SD00185
Figure 2. Block Diagram
4
2000 Jan 31
NXP [ NXP ]
