Philips Semiconductors
Product specification
Enhanced octal universal asynchronous
receiver/transmitter (Octal UART)
SCC2698B
BLOCK DIAGRAM
INTERNAL DATA
BUS
8
D0–D7
BUS BUFFER
CHANNEL A
TRANSMIT HOLD
REGISTER
TxDA
TRANSMIT SHIFT
REGISTER
RECEIVE HOLD
REGISTER (3)
RxDA
RECEIVE SHIFT
REGISTER
MR1, 2
CR
SR
CSR Rx
CSR Tx
TIMING
X1/CLK
X2
CRYSTAL
OSCILLATOR
POWER-ON
LOGIC
CHANNEL B
(AS ABOVE)
INPUT PORT
CHANGE-OF-
STATE
DETECTORS (4)
IPCR
ACR
TxDb
RxDb
BLOCK A
TIMING
CONTROL
RDN
WRN
CEN
A0–A5
RESET
6
OPERATION CONTROL
ADDRESS
DECODE
R/W CONTROL
2
MPI0
2
MPIb
OUTPUT PORT
BLOCK B
(SAME AS A)
FUNCTION SELECT
LOGIC
OPCR
TIMING
CLOCK
SELECTORS
COUNTER/
TIMER
ACR
CTUR
CTLR
BLOCK D
(SAME AS A)
INTERRUPT CONTROL
IMR
ISR
2
2
2
MPP1
MPP2
MPO
BLOCK C
(SAME AS A)
INTRAN
SD00185
Figure 2. Block Diagram
2000 Jan 31
4