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SAA7146AH 参数 Datasheet PDF下载

SAA7146AH图片预览
型号: SAA7146AH
PDF下载: 下载PDF文件 查看货源
内容描述: 多媒体桥接器,高性能倍线器和PCI电路SPCI [Multimedia bridge, high performance Scaler and PCI circuit SPCI]
分类和应用: 商用集成电路PC
文件页数/大小: 144 页 / 646 K
品牌: NXP [ NXP ]
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Philips Semiconductors  
Product specification  
Multimedia bridge, high performance  
Scaler and PCI circuit (SPCI)  
SAA7146A  
7.4.4.7  
INTERRUPT  
7.4.4.9  
JUMP  
The INTERRUPT command will set the RPS_I bit of the  
task in the Interrupt status register (see Table 41) if it is  
executed and the condition described by the event flags is  
true. The execution of RPS continues. The format of the  
Interrupt command is shown in Tables 24 and 25.  
The JUMP command is a two Dword command.  
The second Dword contains the physical address at which  
the RPS will continue its execution. The address in the  
second Dword is directly transferred to the RPSAddr  
Register. The command specific part in the first Dword of  
the JUMP command is like the INTERRUPT command.  
If the addressed event is true the JUMP will be performed  
otherwise the execution will continue at the next  
command. If no event is addressed the JUMP will be  
unconditional. The format of the JUMP command is shown  
in Tables 28 and 29.  
The OAN bit specifies if the condition in bits 25 to 0 is an  
AND (OAN set to 0) or if the condition is an OR (OAN set  
to 1). If the INV bit is set this command will wait for the  
condition to become false.  
7.4.4.8  
STOP  
The OAN bit specifies if the condition in bits 25 to 0 is an  
AND (OAN set to 0) or if the condition is an OR (OAN set  
to 1). If the INV bit is set this command will wait for the  
condition to become false.  
The STOP command will terminate the RPS execution and  
reset the ERPS-bit. The command specific part of the  
STOP command is like the INTERRUPT command. If the  
addressed event is true the STOP will be executed  
otherwise the execution will continue with the next  
command. If no event is addressed the STOP will be  
executed unconditionally. The format of the STOP  
command is shown in Tables 26 and 27.  
The OAN bit specifies if the condition in bits 25 to 0 is an  
AND (OAN set to 0) or if the condition is an OR (OAN set  
to 1). If the INV bit is set this command will wait for the  
condition to become false.  
1998 Apr 09  
37  
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