Philips Semiconductors
Preliminary specification
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI-data slicer and high performance scaler
SAA7114H
Table 114 Prescaler DC gain and FIR prefilter control; register set A (A2H[7:4]) and B (D2H[7:4])
X = don’t care.
CONTROL BITS D7 TO D4
FIR PREFILTER CONTROL
Luminance FIR filter bypassed
H_y(z) = 1⁄4(1 2 1)
H_y(z) = 1⁄8(−1 1 1.75 4.5 1.75 1 −1)
H_y(z) = 1⁄8(1 2 2 2 1)
PFUV1
PFUV0
PFY1
PFY0
X
X
X
X
0
X
X
X
X
0
0
0
0
1
1
0
1
1
Chrominance FIR filter bypassed
H_uv(z) = 1⁄4(1 2 1)
H_uv(z) = 1⁄32(3 8 10 8 3)
H_uv(z) = 1⁄8(1 2 2 2 1)
X
X
X
X
X
X
X
X
0
1
1
0
1
1
15.5.10 SUBADDRESSES A4H TO A6H
Table 115 Luminance brightness setting; register set A (A4H[7:0]) and B (D4H[7:0])
CONTROL BITS D7 TO D0
LUMINANCE
BRIGHTNESS SETTING
BRIG7
BRIG6
BRIG5
BRIG4
BRIG3
BRIG2
BRIG1
BRIG0
Value = 0
0
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
Nominal value = 128
Value = 255
Table 116 Luminance contrast setting; register set A (A5H[7:0]) and B (D5H[7:0])
CONTROL BITS D7 TO D0
CONT7 CONT6 CONT5 CONT4 CONT3 CONT2 CONT1 CONT0
LUMINANCE CONTRAST
SETTING
Gain = 0
Gain = 1⁄64
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
1
Nominal gain = 64
Gain = 127
⁄
64
Table 117 Chrominance saturation setting; register set A (A6H[7:0]) and B (D6H[7:0])
CONTROL BITS D7 TO D0
CHROMINANCE
SATURATION SETTING
SATN7
SATN6
SATN5
SATN4
SATN3
SATN2
SATN1
SATN0
Gain = 0
Gain = 1⁄64
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
1
Nominal gain = 64
Gain = 127
⁄
64
2000 Mar 15
124
NXP [ NXP ]
