Philips Semiconductors
Preliminary specification
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI-data slicer and high performance scaler
SAA7114H
15.5.7 SUBADDRESSES 94H TO 9BH
Table 105 Horizontal input window start; register set A (94H[7:0]; 95H[3:0]) and B (C4H[7:0]; C5H[3:0])
CONTROL BITS
A(94H[7:0]) B(C4H[7:0])
XO11 XO10 XO9 XO8 XO7 XO6 XO5 XO4 XO3 XO2 XO1 XO0
HORIZONTAL INPUT
ACQUISITION WINDOW
A(95H[3:0]) B(C5H[3:0])
DEFINITION OFFSET IN
X (HORIZONTAL) DIRECTION(1)
A minimum of ‘2’ should be kept, due
to a line counting mismatch
0
0
0
0
0
0
0
0
0
0
1
0
Odd offsets are changing the
UV sequence in the output stream to
VU sequence
0
0
0
0
0
0
0
0
0
0
1
1
Maximum possible pixel
offset = 4095
1
1
1
1
1
1
1
1
1
1
1
1
Note
1. Reference for counting are luminance samples.
Table 106 Horizontal input window length; register set A (96H[7:0]; 97H[3:0]) and B (C6H[7:0]; C7H[3:0])
HORIZONTAL INPUT
ACQUISITION WINDOW
DEFINITION INPUT WINDOW
LENGTH IN X (HORIZONTAL)
DIRECTION(1)
CONTROL BITS
A(96H[7:0]) B(C6H[7:0])
A (97H[3:0]) B (C7H[3:0])
XS11 XS10 XS9 XS8 XS7 XS6 XS5 XS4 XS3 XS2 XS1 XS0
No output
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Odd lengths are allowed, but will be
rounded up to even lengths
Maximum possible number of input
pixels = 4095
1
1
1
1
1
1
1
1
1
1
1
1
Note
1. Reference for counting are luminance samples.
Table 107 Vertical input window start; register set A (98H[7:0]; 99H[3:0]) and B (C8H[7:0]; C9H[3:0])
CONTROL BITS
VERTICAL INPUT ACQUISITION
WINDOW DEFINITION OFFSET IN A(98H[3:0]) B(C8H[3:0])
Y (VERTICAL) DIRECTION(1)
A(98H[7:0]) B(C8H[7:0])
YO11 YO10 YO9 YO8 YO7 YO6 YO5 YO4 YO3 YO2 YO1 YO0
Line offset = 0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
Line offset = 1
Maximum line offset = 4095
Note
1. For trigger condition: STRC[1:0]90H[1:0] = 00; YO + YS > (number of input lines per field − 2), will result in field
dropping. Other trigger conditions: YO > (number of input lines per field − 2), will result in field dropping.
2000 Mar 15
121
NXP [ NXP ]
