SAA7113H
Philips Semiconductors
9-bit video input processor
9.2.12 Subaddress 0Bh
Table 39: Luminance contrast control subaddress 0Bh (D7 to D0)
Gain
Control bits D7 to D0
CONT7 CONT6 CONT5 CONT4 CONT3 CONT2 CONT1 CONT0
1.999 (maximum)
1.109 (ITU level)
1.0
0
0
0
0
1
1
1
1
1
0
1
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
0 (luminance off)
−1 (inverse luminance)
−2 (inverse luminance)
9.2.13 Subaddress 0Ch
Table 40: Chrominance saturation control subaddress 0Ch (D7 to D0)
Gain
Control bits D7 to D0
SATN7 SATN6 SATN5 SATN4 SATN3 SATN2 SATN1 SATN0
1.999 (maximum)
1.0 (ITU level)
0
0
0
1
1
1
1
0
1
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
0 (color off)
−1 (inverse chrominance)
−2 (inverse chrominance)
9.2.14 Subaddress 0Dh
Table 41: Chrominance hue control subaddress 0Dh (D7 to D0)
Hue phase (deg)
Control bits D7 to D0
HUEC7 HUEC6 HUEC5 HUEC4 HUEC3 HUEC2 HUEC1 HUEC0
+178.6...
...0...
0
0
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
...−180
9.2.15 Subaddress 0Eh
Table 42: Chrominance control subaddress 0Eh
Function
Control bit
Logic
level
Data bit
50 Hz
60 Hz
Chrominance bandwidth (CHBW0 and CHBW1)
Small bandwidth (≈ 620 kHz)
CHBW1
CHBW0
CHBW1
CHBW0
CHBW1
CHBW0
CHBW1
CHBW0
0
0
0
1
1
0
1
1
D1
D0
D1
D0
D1
D0
D1
D0
Nominal bandwidth (≈ 800 kHz)
Medium bandwidth (≈ 920 kHz)
Wide bandwidth (≈ 1000 kHz)
9397 750 14232
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2005
43 of 75
NXP [ NXP ]
