Philips Semiconductors
Product specification
Octal D-type transparent latch with 5-volt
tolerant inputs/outputs (3-State)
74LVC573A
PIN DESCRIPTION
LOGIC SYMBOL (IEEE/IEC)
PIN NUMBER SYMBOL
FUNCTION
11
1
OE
Output enable input (active-Low)
C1
2, 3, 4, 5,
6, 7, 8, 9
1
D0-D7
Data inputs
EN1
19, 18, 17, 16,
15, 14, 13, 12
Q0-Q7
Data outputs
2
19
18
17
16
15
14
13
12
1D
3
4
5
6
7
8
9
10
11
20
GND
LE
Ground (0V)
Latch enable input (active-High)
Positive supply voltage
V
CC
PIN CONFIGURATION
OE
D0
1
2
3
4
5
20
19
18
17
16
V
CC
SA00397
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
LE
FUNCTIONAL DIAGRAM
D1
D2
D3
2
3
4
5
6
7
D0
D1
D2
D3
D4
D5
Q0
Q1
Q2
Q3
Q4
Q5
19
18
17
16
D4
6
7
15
14
13
12
11
D5
D6
8
3-State
OUTPUTS
LATCH
1 to 8
D7
9
15
GND
10
14
8
9
D6
D7
Q6
Q7
13
12
SA00395
LE
11
1
LOGIC SYMBOL
OE
SA00398
1
OE
D0
D1
D2
D3
D4
D5
D6
D7
19
18
17
16
15
14
13
12
2
3
4
5
6
7
8
9
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
LE
11
SA00396
3
1998 Jul 29
NXP [ NXP ]
