ISP1581
Hi-Speed USB peripheral controller
Philips Semiconductors
Table 37: DMA Strobe Timing register: bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
Reset
reserved
DMA_STROBE_CNT[4:0]
-
-
-
-
-
-
1FH
1FH
R/W
Bus reset
Access
R/W
R/W
R/W
Table 38: DMA Strobe Timing register: bit description
Bit
Symbol
Description
7 to 5
4 to 0
-
reserved.
DMA_
STROBE_
CNT[4:0]
These bits select the strobe duration for DMA_MODE = 03H
(see Table 33). The strobe duration is (N+1) cycles[1], with N
representing the value of DMA_STROBE_CNT (see Figure 5).
[1] The cycle duration indicates the internal clock cycle (33.3 ns/cycle).
x
x
(N + 1) cycles
004aaa125
Fig 5. Programmable strobe timing.
9.4.6 Task File registers (addresses: 40H to 4FH)
These registers allow direct access to the internal registers of an ATAPI peripheral
using PIO mode. The supported Task File registers and their functions are shown in
Table 39. The correct peripheral register is automatically addressed via pins CS1,
CS0, DA2, DA1 and DA0 (see Table 40).
Table 39: Task File register functions
Address (Hex)
ATA function
ATAPI function
data (16-bits)
error/feature
1F0
1F1
1F2
1F3
1F4
1F5
1F6
1F7
3F6
3F7
data (16-bits)
error/feature
sector count
interrupt reason
reserved
sector number/LBA[7:0]
cylinder low/LBA[15:8]
cylinder high/LBA[23:16]
drive/head/LBA[27:24]
command
cylinder low
cylinder high
drive select
status/command
alternate status/command
reserved
alternate status/command
drive address
9397 750 13462
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 06 — 23 December 2004
37 of 79
NXP [ NXP ]
