ISP1581
Hi-Speed USB peripheral controller
Philips Semiconductors
Table 44: Task File register 1F3 (address: 4AH): bit allocation
CS1 = H, CS0 = L, DA2 = L, DA1 = H, DA0 = H.
Bit
7
6
5
4
3
2
1
0
0
0
0
0
Symbol
Reset
sector number/LBA[7:0] (ATA), reserved (ATAPI)
00H
00H
R/W
Bus reset
Access
Table 45: Task File register 1F4 (address: 4BH): bit allocation
CS1 = H, CS0 = L, DA2 = H, DA1 = L, DA0 = L.
Bit
7
6
5
4
3
2
1
Symbol
Reset
cylinder low/LBA[15:8] (ATA) or cylinder low (ATAPI)
00H
00H
R/W
Bus reset
Access
Table 46: Task File register 1F5 (address: 4CH): bit allocation
CS1 = H, CS0 = L, DA2 = H, DA1 = L, DA0 = H.
Bit
7
6
5
4
3
2
1
Symbol
Reset
cylinder high/LBA[23:16] (ATA) or cylinder high (ATAPI)
00H
00H
R/W
Bus reset
Access
Table 47: Task File register 1F6 (address: 4DH): bit allocation
CS1 = H, CS0 = L, DA2 = H, DA1 = H, DA0 = L.
Bit
7
6
5
4
3
2
1
Symbol
Reset
drive/head/LBA[27:24] (ATA) or drive (ATAPI)
00H
00H
R/W
Bus reset
Access
Table 48: Task File register 1F7 (address: 44H): bit allocation
CS1 = H, CS0 = L, DA2 = H, DA1 = H, DA0 = H.
Bit
7
6
5
4
3
2
1
Symbol
Reset
command (ATA) or status[1]/command (ATAPI)
00H
00H
W
Bus reset
Access
[1] Task File register 1F7 is a write-only register; a read will return FFH.
9397 750 13462
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 06 — 23 December 2004
39 of 79
NXP [ NXP ]
